How to trigger two counters simultaneousely on a PCI 6122 (DAQ-STC)?

[DanceWiz]

Hi,

I posted a question on the Multifunction DAQ by mistake, when it should have really been here, on the Countes/Timers board.  I guess I am still hopeful that there is a way to do what I am trying to achieve.  

I would really like to see if anyone has any other opinions and/or possible solutions to my problem.  The link to my original post is below.

Thanks in advance for anyone who wants to give it a/another try 🙂

http://forums.ni.com/ni/board/message?board.id=250&message.id=51882#M51882 

Message Edited by DanceWiz on 09-15-2009 10:25 AM

[Doug_L._Bear]

I still don't think this is going to be possible for you unless you just artificially wait until the counters have armed to start the acquisition.  The error you are seeing is because the PFI lines are all reserved for the counter task and you can't be routing to them because of that.

[DanceWiz]

Hi Doug,

I thought that there may be a way of getting around this problem by setting the tristate property to flase, but I take it that this can only be done for the counter's output to a PFI line, and not the gate (or source) right?

[Doug_L._Bear]

I feel like such a debbie downer, but it looks like the tristate option is only applicable to Digital I/O tasks.  Because all of your lines will have already been reserved by the counter you shouldn't be able to access them with a DIO task to be able to set the tristate properties.

[DanceWiz]

Aaahhhh! Ok. Well, thanks for setting the facts (and me) straight So the next idea was to have both of the counters and the DI line that will be receiving the trigger run off of the same "Sample Clock", i.e. ai/SampleClock.  First prepare both of the counters, then prepare the DI line, and then start all of them at the same time.  This would all be done well before the expected trigger would come in, so that all of these channels would already be collecting data simultaneousely well ahead of the trigger.  In this way, I can correlate the time that the trigger is received in the DI channel with the time in the counter channels.  Is this what you were referring to as artificially arming the counters? 

[DanceWiz]

I forgot to add a couple of more question to my previous post:

1. If I am using "ai/SampleClock" (which is 20MHz for this device) as the source for "Sample Clock", do I need to route it to the counter's "Gate" or does DAQmx automatically recognize the source of "Sample Clock" in a buffered edge counting task as the input for the counter's "Gate"?
2. If the answer to question (1) is that I'd still need to input a signal into "Gate", I would be using the "DAQmx Export Signal.vi", as shown in the attached snapshot.  In this case, the "signal" for "DAQmx Export Signal.vi" would be "Sample Clock" and the "output terminal" would be PFI 9, which is the terminal for "Ctr 1 Gate" for my device. Now, would the "Sample Clock" in this Export Signal.vi's "signal" input be referring to ai/Sample Clock, which is the "source" of "Sample Clock", i.e. 20MHz in this case, or would it be referring to the customized "Sample Clock", i.e. 10,000Hz in "Rate". 

Thank you very much for all your help.

[Doug_L._Bear · Accepted solution]

That sounds like it might work for you.  Also, the sample clock should be automatically routed to the gate with no effort on your part required.