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PWM duty cycle update stalls

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Hello

I want to output a variable pulse width modulated signal via counters. The duty cylce should follow a sine or triangle pattern from 10 to 90 percent.

 

Problem: When I observe the ctr output with an oscilloscope, I see that the update stalls, i.e. for some time, the output is seamlessly variable as expected, but then, update stalls and jumps to a new duty cycle to continue variable again.

 

I tried several different approaches,

  -for-loop with wait ms- timing and single sample,

Ctr_Stall_VI_3.png

 

  -timed loops with single sample and

Ctr_Stall_VI_2.png

 

  -pulse train ouptut via DaqMX-Write-Counter-n-Samples.

 

Ctr_Stall_VI_4.png

 

 

Albeit to no avail. In any case, I get jumps in the PWM duty cycle instead of smooth transitions.

 

System is either cDAQ 9174 or PXI with 6602. As system load is 99% idle state, I can't imagine the OS at fault.

 

 

 

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I forgot to mention that PWM base frequency is 140 Hz, so at appr. 7 ms update interval, I'd think there ought to be enough time for the OS to write data down to the counter card.

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Hi there,

 

unfortunately I am not able to see any details on the screenshots. Could you please attach them in higher quality or attach the VIs.

 

Did you already take a look at the NI Developer Zone. There are several examples and tutorials.

 

I have here the link for you:

http://digital.ni.com/public.nsf/allkb/294E67623752656686256DB800508989?OpenDocument

 

Best regards,

Frank

 

 

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Hello, Frank

After looking through some documentation, I think that I need RT-HW for what I want.

6602 cards have STC-2 without buffer, so updating duty cycle is OS-limited. Even in timed loops there is no guarantee that update will run at the specified rate of 1/140 sec. I'll probably just get an error for untimely execution....

 

 

With STC-3 based counters (such as cDAQ9074 or X.series PXI 6361) I can load 127 values into buffer which will be processed smoothly but on renewal of samples (every 127/140 sec), I get stalls again, since the OS seems to consider my request inappropriate. I was surprised to find that USB vs PXI does not change the behaviour, though I'd have expected better latency from PXI.

 

Attached, please find a VI to get an impression of what I tried out. Pardon for code ugliness.

 

I still hope that I maybe have missed something simple to get running with what HW I got

Best regards

Michael

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Solution
Accepted by topic author nimic

Hi nimic,

 

You are correct that STC-2 based counters do not have an on-board FIFO for the counters and so the updates are software-defined and thus non-deterministic.

 

However, on STC-3 based counters, you can actually buffer more than 127 samples--the on-board FIFO is 127 samples long but you can buffer up data in PC memory which will be transferred to the device as space becomes available.  To do this, write data before starting your task.

 

In fact, I believe the following example should be nearly exactly what you need (will not work on the 6602 though):

https://decibel.ni.com/content/docs/DOC-12161

 

 

Best Regards,

John Passiak
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