Counter/Timer

cancel
Showing results for 
Search instead for 
Did you mean: 

Sync ctr1 to ctr0 (generating freq outputs) via export signal

Solved!
Go to solution

I need help with configuring the counter output channels on my pxi-6723 card. Here is what I'm trying to do:

- have the ability to sync ctr1 output to ctr0. Note: ctr1 must start on rising or falling edge of ctr0 output.

- be able to change idle, freq..etc for each of these outputs

 

Attached is a sample I've been working on. It works except the ctr1 output is lagging by 1 to 1.5 cycles (depending on idle state,edge selections). This lag is caused by me having to put the slave (ctr1) run task after the master's. Note: The reason for this was the run task of crt0 (master) was causing false triggers when exporting the trigger signal.

 

Its there a way to software trigger ctr0 OR hold off its output until both (ctr0 & ctr1) "run tasks" have been launched ?

0 Kudos
Message 1 of 2
(4,589 Views)
Solution
Accepted by topic author groz

Hi groz,

 

I haven't tried it, but I would expect the following sequence to prevent the false triggers:

 

DAQmx Control Task(ctr0 task, Commit)

DAQmx Start(ctr1 task)

DAQmx Start(ctr0 task)

 

Committing ctr0 should set it to its idle state.

 

Also, I think you can do this triggering without using a PXI_Trig line. For Start.DigEdge.Src on the ctr1 task, specify "Ctr0InternalOutput". (To make the Ctr0InternalOutput terminal show up in a DAQmx Terminal I/O constant, right click on the constant, select "I/O Name Filtering...", and put a check next to "Include Advanced Terminals".)

 

Brad

---
Brad Keryan
NI R&D
0 Kudos
Message 2 of 2
(4,570 Views)