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How data is send trough fpga and SIT for hardware in loop simulation in labview 7.1

Hi

    I am using Labview 7.1 and Matlab 6.5 and cRIO to do a HIL simulation for a Hydraulic cylinder control. I have made dll file succussfull, after that when I want to run it with RT target unable to connect the port of cRIO. How the port of cRIO is connected to the program when it running RT target. Also how data is write to a file or lvm file whe it run RT target.

 

Thanking you

Bikash Kumar Sarkar 

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