How much noise is expected on 6353 digital output lines?

[Dekay]

I'm sending a signal to switch a set of reed relays with the DO port on a pci-e 6353. When the line is low, the noise is ~10mV. When high, the noise is ~30-40mV. The noise appears to be getting through to the signal lines in the reed relays.

Is this the noise level that is expected?

I plan to switch to electrostatic shielded relays. Meanwhile, does the filter mentioned in the 6353 manual only apply to digital input?

Thanks for the help

[GarPar]

Hi Dekay-

     When working with TTL digital lines, all that the receiver needs is the high-to-low or low-to-high transition.  Therefore, 10-40 mV of noise is fine.  Anything over about 2.7 V is registered as high and anything below about 0.4 V is low.  40 mV of noise around 5 V will still register high and the same goes for digital low.

     The digital filter does only apply to digital input.

     I hope this helps!

[John_P1]

If this noise is a concern you might instead wish to use the Analog Output lines if they are available and can source enough current.

The 6353 has configurable digital filters for each of the input lines.  The filtering only applies for input tasks, but even so it is a digital filter and wouldn't have any affect on reducing noise unless that noise causes false TTL transitions.  Essentially the filter can block pulse widths that are below a certain threshhold.

Best Regards,

[Dekay]

Do you know if the noise levels that I'm seeing are typical?

I'm using all three ports, so there wouldn't be enough analog output lines to cover it, if I were to use analog lines rather than the digital lines.

Thanks

[John_P1 · Accepted solution]

Hi Deekay,

Here are the results from my 6353 running a loopback from DO to AI (at High and Low)

So, at High logic levels I am seeing noise on the order of what you described.  At low logic levels my noise is significantly less.  I suppose it really depends on how noisy your ground plane is and what else the board is doing, as well as what is connected to it.

     *Edit, I suppose a more legitimate test would be to use a 2nd board to measure the voltage output.  I still think this test has some merit in showing that some noise on the DO line is not uncommon.

In any case, since the lines are Digital Outputs, the spec just states that they must meet TTL voltage levels (< .4V for a logic low, >2.4V for logic high).  I don't have any typical numbers for noise on the lines, but what you're seeing does not seem unreasonable.  Have you tried adding bypass capacitors at your relays by any chance?

Best Regards,

[Dekay]

Thanks for checking the noise level. I'll add bypass caps as well as shielded reeds.