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Impedance of DIO for NI USB-7865R FPGA & SCB-68A

Hi Everyone,

 

I am posting this cause we have been using the NI USB-7865R FPGA boards for some time and have encountered the following issue: the digital signals output from the NI USB-7865R FPGA, managed with LabVIEW 2016 32 bit, and programmed to buffer the 3V3 output on the Connector '0' connected to the SCB-68A board, which should be able to interface with 50Ohm loads, in reality when connected to external loads of 50Ohm they do not work correctly (the output amplitude is more than halved).

 

If, on the other hand, the same signals are interfaced with high impedance external loads (1 MOhm), they function correctly and maintain the declared 3V3 levels. Here is a passage from the datasheet (https://www.ni.com/pdf/manuals/374974a.pdf) of the card in question, to further report the problem encountered:

 

"All the high-speed DIO channels on Connector 0 are routed with a 50 Ω characteristic trace
impedance. Route all external circuitry with a similar impedance to ensure best signal quality.
NI recommends performing signal integrity measurements to test the affect of signal routing
with the cable and connection accessory for your application."

 

Any suggestion on what to do? Could it be that our card has some problems?

 

Regards,

 

Alessandro Rossetta

 

 

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The impedance specified there is NOT a DC Impedance.  Read this.

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