On a PXI 5122, why does my acquisition always occur 500 ns early?

[_S_G]

I have a PXI system with a DWG (PXI 6541), an AWG (PXI 5412) and a digitizer (PXI 5122).  I use a trigger (RTSI 0) from the DWG to trigger the AWGs and the digitizer.  The output of the AWGs is connected to the digitizer.  My reference position is set to 0 %.  Therefore, I expect that the waveform captured by the digitizer is exactly the same as the waveform produced by the AWG.

However, I notice that the waveform captured by the digitizer is always off by approximately 500 ns  i.e. I capture 500 ns worth of pretrigger data.  I can fix this problem by specifying a trigger delay of 500 ns, but I do not understand why I need to do this?

My digitizer sample rate is set at 100 MHz, so even if coercion is happening, I would expect my waveform to be off by 1/100M = 10 ns.  My DWG sample rate is set at 50 MHz.

[DFGray]

There are a couple of reasons you could be getting this delay.

1. The RTSI line produces a delay of around 40ns.  This is caused by line length and propagation delays of the transmitters and recievers.  Note that due to differences in line length, your synchronization delays down the chassis for a RTSI line will be slightly different.
2. The propagation time down the cable from the generator to the digitizer causes a delay.  This is probably the major portion of it.  Use the shortest cable you can if you want to minimize it.  Cable delays are usually consistent, but they can change if the cable configuration changes (e.g. add a loop to the cable or run it across a metal table).
   

Since all your devices are SMC capable, you may want to consider fully synchronizing them instead of using just a trigger.  Full synchronization will synchronize the clocks and clock phases as well as the trigger.  This will give you better run-to-run repeatability.  Look up examples for NI-TClk to get you started.  There are several that ship with NI-SCOPE and NI-FGEN.

Let us know if you need more help.


Message Edited by DFGray on 01-23-2008 07:25 AM

[Matt_E.]

The 5412 has a deterministic delay from a start trigger to the beginning of analog output.  The length of this delay is dependant on the interpolation factor of the digitial interpolation filter and also your sample clock frequency.  With a 100Mhz sample clock and the interpolation filter disabled the delay is 43 sample clock periods + 110 ns which would be would be ~ 580 ns.  The delay in the PXI trigger lines could indeed cause a bit of delay between the AWG getting the start trigger and the digitizer getting the start trigger.  Depending on which slots you have each board in this propagation delay could either add or subtract from the 580 ns.  Since this delay should be deterministic measuring it and specifying the value as a trigger delay to the digitizer is a ok way to solve the problem.

You can find more info on the 5412 delay in the spec sheet by going to Start -> programs -> National Instruments -> NI-FGEN -> Documentation ->Hardware Specifications -> NI 5412 Specifications

Hope this helps,

-Matt

[_S_G]

Thanks for the responses.  That seems to explain the behavior of my system.