08-14-2016 11:44 PM
Hi all,
I have 2 signals, and I want to interleave them before transmit via RF.
They are interleaved with rate 1:1.
I use "PC USRP RIO 40 MHz BW Signle-Device Streaming" to transmit and receive them continuously.
But in receiver side, I have problems when distribute them to 2 signals. The received signal is mixed between 2 signals.
Please help me to fix this issue.
My project link: https://www.dropbox.com/s/b7x752kuirs31un/Test%20Interleave%20%28continuous%29.rar?dl=0
The host file is "Host.gvi" and FPGA file is "Streaming Xcvr (FPGA).gvi"
Thanks,
08-16-2016 05:32 PM
Can you provide any more information about what you are trying to do with your code? What is the end goal? Why do you want to interleave samples?
Regards,
Michael Bilyk
Applications Engineer
08-16-2016 06:09 PM
Do you interleave on the host or the FPGA? Did you verify the interleaving in simulation?
Similarly, are you de-interleavingo on the host or FPGA? Did you test in simulation?
Also, can you clarify "he received signal is mixed between 2 signals."?
08-17-2016 04:13 AM
In my project, I need to transmit two parallel 32 bit signal through RF. So I interleave them in transmitter side and de-interleave in receiver side. I use both transmitter and receiver in one USRP device.
08-17-2016 04:26 AM
I interleave and de-interleave on FPGA. I tested in simulation and everything is OK.
But when I try to transmit and receive through RF, the result is wrong.
"The received signal is mixed between 2 signals." means that: In the receiver side, after de-interleaving the signals, I can not receive signal A and signal B separately. They are mixed (please refer the graph I captured)