10-18-2016 08:45 AM
10-18-2016 11:11 AM
Are you using the FPGA? If so, can you use the RF x/Rx/Enable or RF x/Tx/Enable to enable or disable TX on the RX device and vice versa?
Rereading your post, it looks like you are already doing that. When putting a false in the RF0/Rx/Enable while it is supposed to be transmitting, are you seeing garbage data or is it real data? I believe on the FPGA the USRP will continue to read from the RX lines even if the data is invalid. If you are seeing garbage data that is expected. Seeing valid data is a different story, my initial thought is that this is not the expected behavior but I would have to look into it further.
If you are seeing garbage data than just throw out those samples.
Cheers
10-18-2016 11:32 PM
Yes I am toggling the values of ATR registers in main GUI. I am using CASE structure with some amount of waiting time in each stage.
1. Any better way to design routine?
Whats surprising is I am receiving self transmitted values, the amplitude is very high compared to the what to be received in next slot. So it masks the actual data.
2. Can you share your version of expected design for this routine either using ATR registers or without?
3. Yes I got suggestions to drop the garbage, if that's the case, how can I do it in runtime? Any example?