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Xilinx FFT IP in clock driven logic

Hello all,

 

Does anyone know where I can find an example project or VI that uses the FFT IP from Xilinx in a CDL?

 

A simple example which configures the FFT in run time via 's_axis_config' bus and then computes one transform is OK.

 

 

Thanks!

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Hi,

 

You can check the subVI Xilinx FFT.gcdl in 802.11 Application framework. It is a good example to use as reference to implement a Xilinx FFT.

 

You can also use Xilinx FFT datasheet available in below link to understand all inputs and outputs.

 

http://www.xilinx.com/support/documentation/ip_documentation/xfft/v9_0/pg109-xfft.pdf

 

Thanks,

Lincoln

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