01-08-2019 05:16 PM - edited 01-08-2019 05:24 PM
Hello,
Actually, i am working with Crio 9030 and module c serie 9205 for measuring voltage.
In total, i have 64 channel. so i want to do acquisition of this 64 channels and i am using data fifo to send data from the FPGA to the host (target to host DMA).
My question is how to specify the right size of data fifo ? because sometimes i m getting error due to (data fifo full).
Also, i think that the rate of FPGA loop can modify my measurement ?
Also what is the maximal sampling frequency in this case ? because i am using 64 channels.
I think that my module NI9205 has a sampling freq of 250kech/s.
thakyou.
Solved! Go to Solution.
01-16-2019 04:53 AM
Hello belaji93,
The size of the FIFO is not the only concern: your write speed and your read speed also matter!
I suggest you to check following documentation that might help you:
http://zone.ni.com/reference/en-XX/help/371599P-01/lvfpgaconcepts/fpga_dma_fifo_buffer_size/
http://zone.ni.com/reference/en-XX/help/371599P-01/lvfpgaconcepts/fpga_fifo_using_builtin/
Your module is multiplexed so you have to divide 250 kS/s by your 64 channels.
Have a nice day!
Regards,
Armando
01-18-2019 04:48 AM
Hello ArmandoF,
Thankyou for your answer.
For exemple, if i have a Crio 9030, and two C modules NI9205 (each module has 32 channels).
In total, i am doing aquisition of 64 channels (two modules).
Each module can equire 250 Kech/s.
So in order to calculate the loop rate of my FPGA vi, i need to divide 250 Kech/s by 64 or by 32 ?
Thankyou so much.
BELAJI
01-18-2019 11:00 AM
Hello belaji93,
You have 2 modules then each one gives 250 Kech/s /32.
Have a nice week end!
Regards,
Armando
01-18-2019 11:17 AM
Thankyou so much.
Have a good weekend.
BELAJI