7833R doesnt run the code correctly after compiling fpga software when board is connected to an optically isolated driver circuit

[Incensus]

Hi everyone! I'm using Labview 2009+FPGA Module on 7833R. I'm trying to control a full-bridge converter which is optically isolated. 

Until now, i managed to generate four channel sinusodial PWM  and to measure current sensor output.

But I've got a strange problem that if converter circuit is connected to 7833R while compiling FPGA code, FPGA target doesn't work correctly and I dont get any PWM output (analog data acquisition works fine).

If I compile the code without any connection to circuit, everything works fine. It generates sinusodial PWM. But if I stop the process and restart, it ceases to work and there is no PWM as in the problem that I mentioned before.

So at this point I couldn't find where the problem is and I'm totally stuck.

Any suggestions for the cure is appreciated: ]

Ouz 

[LV_Pro]

Can you put a scope on the 7833R's outputs, before the optical isolator, to see if  you may actually be generating the signal and have an issue with the isolator?

[Incensus]

Of course I tried it when debugging. 

I only get a square wave with duty cycle of %98(almost).

ouz

[Elizabeth_K.]

To clarify, you experience a problem with outputting the PWM signal if the circuit is connected during the compilation process, and then run on the FPGA.  If the circuit it not connected during the compilation and run process, and then connected, everything runs fine.  This is not a question about running the circuit during the compilation, correct?

The FPGA compilation process takes the VI code and transforms it into a bitfile that can be downloaded onto the FPGA.  Whether or not anything is connected to the outputs of the 7833R should not affect that bitfile.

Would you mind providing a little more information on exactly what you are doing to compile the VI?  Are you hitting the Run button?  And when you mention that you stop the compilation process and restart, when in the compilation process is does that occur?

Regards,

Elizabeth K. 

National Instruments | Applications Engineer | www.ni.com/support 

[Incensus]

Hi again..

Yes I experience the problem after compilation not during it and there is no error reported after compilation. 

And if I stop and restart VI (i wrote this as the process in the previous post, i think its a little misleading. i mean stopping and restarting the whole project not the compilation), PWM output fails again as in compiling the project while circuit is connected to FPGA board.

I tried both "RUN from the host VI menu", "mass compile on project" and "compile on target vi" at different times, but it didnt change anything. The problem is still there.

[Elizabeth_K.]

When implementing FPGA code in LabVIEW, there are three steps.  First, compilation, which can be done even without the device connected.  Second, downloading, which puts the FPGA code onto the device.  Third, running the VI.  More information can be found here - Compiling, Downloading, and Running FPGA VIs (FPGA Module).  Please pay attention to the warning down at the bottom.

I think your problems may be arising during the downloading and running portion of this process, not the compilation. In order to confirm this, I would like you to do the following:

1. Compile your VI while the circuit is connected by right-clicking the FPGA VI and selecting Compile.  

2. Disconnect your circuit.

3. Download the VI by right-clicking the FPGA VI and selecting Download.

4. Run the VI by hitting the Run button.

5. Connect your circuit.

If we can narrow it down to the downloading and running process, I can understand that it still does not do what you want, because you would still need to disconnect the circuit to change the code.  Is there any way to power off the circuit while downloading and running?  This may alleviate the problem as well.

Regards,

Elizabeth K. 

National Instruments | Applications Engineer | www.ni.com/support 

[Incensus]

Hi again..

I realized that the problem isnt about the external circuit or any ground loop. It depends on the data transfer between host vi and FPGA vi. If I run the host vi first, fpga starts as if it couldnt get variable values from host vi. So I include a "FPGA Reset" command before writing any variables to FPGA. It seems that problem is solved.

Thank you..