Dear NI Community,
There is a coercion dot adjacent to the FIFO Write, Element input which receives data from a 9202 C Module - please see 9202 Check.VI
9202 Check.VI is a copy of the 9202 Getting Started example. The settings for the DMA channel, named FIFO, are in the attached image files.
The code was generated in LV2020.
The data acquisition works OK but not sure why the coercion dot is there. Presumably there is a mismatch in the data formats?
Any assistance would be greatly appreciated.
