01-07-2010 02:56 PM
Is there any reason to run a DC mean on the signal from a 9215 +/- 10v 16 bit AI channel that is providing a
signal reading from a battery under a load test?
When i setup the DC mean express vi in the FPGA code the resuslts delivered appeared to be skewed.
I was using six of the DC mean express VIs on six seperate channels (2 cards) using 32 samples.
I setup a case that allowed the DC mean values to pass if all six express VIs notified the FPGA that all the data results were
good otherwise it passed the previous data. It turns out it took to long to get all the express VIs to complete as the FPGA
was forwarding 5 consectutive identical siganls.
1. Should I be using DC mean
2. Why does it appear to be taking so long to get the 6 DC Mean express VIs to complete and forward new data?
Thanks
Tim C.
01-11-2010 04:46 PM
Hello Tim C,
Thank you for using NI support. So how many samples are you acquiring on each channel and at what sampling rate? It could be that you acquiring slowly and that's why the channels aren't being updated fast enough. Also, what is the reasoning for taking the DC mean?
Regards,