07-22-2013 03:22 AM
Hi,
In my program in LabVIEW FPGA, the FPGA I/O Node is placed inside a conditional loop. I need to acquire analog input from the FPGA I/O Node just once when a boolean is on. This boolean continuously goes on and off at regular intervals.
When the boolean is off, no analog input has to be acquired and when it switches to 'on', data has to be acquired just once and stopped.
However, since the boolean is ON over a period of time (few milli seconds); data is being acquired as long as the boolean is on; multiple samples are being input.
Please suggest me how I have to solve this issue. Is there any way we can instruct the FPGA I/O node to acquie a simgle sample?
Thank you
07-22-2013 03:37 AM - edited 07-22-2013 03:38 AM
07-22-2013 07:24 AM
Another option would to use a Wait On Edge node. It looks like an FPGA property node. It has been awhile since I used one, but it worked well. This would freeze your loop until the designated edge you specify on the input occurs.
07-22-2013 08:40 AM - edited 07-22-2013 08:41 AM
As GerdW mentioned, you can check the previous value. You can use a feedback node (wired in the Forward direction) to get access to the previous iteration's value or a shift register. Use boolean logic (Current value) AND (NOT(Previous Value)).
Another option is to change the boolean value to false once a read is completed. This assumes the boolean is not used for anything else as this could cause problems.