Hi,
I have problems based on dct for labview fpga. I get the project example from this link https://decibel.ni.com/content/docs/DOC-8202. I run the project in labview and its run succesfully. After that, I try to use a different vhdl code for the CLIP (in labview) that I get from open cores (http://opencores.org/project,dct_idct). I rewrite the fpga.vi by inserting a new vhdl code in the CLIP. When I run the project, there are no errors. However, the compressed image is not display. I check the output values from the Read from FPGA block at the host.vi and it shows zero values at all time. I try to debug, but still don't get the solution. Anyone expert please help me. Thanks in advance.
