Data transfer from RT to FPGA using DMA FIFO

[kdm7]

Hello all,

My question is "How do you stream data from RT target to FPGA target using DMA FIFOs?"

I would like to control some indicators (or controls) in FPGA vi using controls in the RT vi using DMA FIFO.

I have used four controls in my RT vi, but I get only one indicator out on my FPGA vi. (I would actually like to use some controls on the FPGA target using controls on the RT target)

Is this possible?

Can anyone help me with this?

I have attached my vi s. 

[RavensFan]

I don't know if you can create an array as an element of the FIFO.  I would tend to think not.  The default datatype for the FIFO is a 64 bit number.  I would recommend packaging your 4 booleans, perhaps converting it to an integer number (Boolean array to number) on the RT, then on the FPGA read that number and break up the bits to get your individual booleans.

[crossrulz]

Based purely on your example, I see two options:

1. Do as RavensFan suggests and use Boolean Array To Number to send a single number down to the FPGA.  Your FPGA can break up the number easily enough to update the indicators.

2. Just write dirctly to the indicators.  I do not see a need for the DMA.  Again, based purely on your example.

[kdm7]

Thank you both for your inputs!