Disorder when using FPGA to save data to TDMS

[iyearning]

Hi everyone,

I meet a strange thing when using FPGA to log data to disk. I use 4 channels and use TDMS to save data. I use 4 different charts to observe each channel and no thing wrong. But when I check the data saved in TDMS, they are not saved in the order they are supposed to be. Each column in the TDMS should represent 1 signla from one channel, but the result shows the data seems fill in one column then another. I just can't understand how it becomes like that. I attached some pictures for your information.

The data from the FIFO.read should be 1 D array, right? So when it passes through the "Array Shape" in my VI, it should become a 4 column 2D array. Each column represents the data from each channel. I don't see any problem with this Vi. Why the data in TDMS is not saved in the correct way?

Thanks

[iyearning]

The VIs are attached here

[crossrulz · Accepted solution]

I think you just need to flip your dimention sizes.  The number of rows should be 500 and your number of columns should be 4.

[iyearning]

Yes, you are quite right! I changed the row and column number and it works well now!

Thank you very much!