Error in IP Export Utility [LabVIEW 2020]

[usman66]

Hi, 

I am getting an error in exporting IP using the IP Export Utility, which says that a Xilinx Vivado error has occured and points me to the Vivado log in the iptemp directory. 

The Error in the Vivado log reads: 

..........

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Finished Part Resource Summary
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Start Cross Boundary and Area Optimization
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ERROR: [Synth 8-729] Failed to open 'C:/NIFPGA/iptemp/ipexport1D3D4902839C45B88E5F229A76CEED9C/.Xil/Vivado-2948-LAPTOP-JISTQGKE/realtime/tmp/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////1DF777F8AF0.rtd': No such file or directory
ERROR: [Synth 8-787] cannot access rtd files in 'C:/NIFPGA/iptemp/ipexport1D3D4902839C45B88E5F229A76CEED9C/.Xil/Vivado-2948-LAPTOP-JISTQGKE/realtime/tmp/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////', this is a FATAL ERROR! Please make sure the directory is readable and writable by the program and do not delete files from this directory while the program is running.
ERROR: [Synth 8-787] cannot access rtd files in 'C:/NIFPGA/iptemp/ipexport1D3D4902839C45B88E5F229A76CEED9C/.Xil/Vivado-2948-LAPTOP-JISTQGKE/realtime/tmp/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////', this is a FATAL ERROR! Please make sure the directory is readable and writable by the program and do not delete files from this directory while the program is running.

Any idea what may cause this error?

[ZYOng]

Like the error message suggested. Is the C:/NIFPGA directory read-only?

[usman66]

No. It isn't 

Here is the snapshot of the error message

 

[usman66]

any suggestions?

If I reduce the amount of logic in the FPGA VI, the problem goes away. 

What I have understood from searching on NI and Xilinx forums, it looks to be a memory issue with Vivado. But, I am not sure how to fix it. 

[Terry_ALE]

How much RAM does your computer have?  What is the FPGA target?

[usman66]

16 GB RAM and the target is X410