Hi all,
I am using a Desktop Execution Node (DEN) to simulate my FPGA design. What I am trying to do on the FPGA is to read a signal spectrum that is 500 points in size and find its FFT. However, to do FFT I had to zero pad the signal (i.e: to just add enough zeroes) for it to reach the nearest power of 2 (i.e: 512). The way I solved the zero padding issue is by nesting a For loop (inside a larger while loop) that iterates 12 times (when a 500 points counter fires a signal) and inserts a zero into the FFT block every iteration. As seen in the attachments, in my host VI I am indexing a text file into the loop and sending it to the FPGA VI through the DEN. I expected that the data index of the FFT block would increment every iteration during the zero padding (i.e: inside the for loop). However, what happens is that the data index does NOT increment during the iterations of the for loop, instead it just "freezes" during the for loop iterations and continues afterwards. I am aware that the DEN updates the indicators only in host loops ( I can see the for loop # indicator reaching 11 right away between 2 iterations of the host VI) and thus I am expecting to see the FFT data index "jump" from 0 to 511 between certain 2 host iterations. What I want to see is the data index incrementing for each "call" of the FFT block (which I assume is happening inside each For loop iteration) . Can anyone provide help with this issue or suggest another solution to do the zero padding for FFT?
P.S: I have attached 3 images showing the host VI and the FPGA VI (during normal operation and when the for loop is entered).
Quick help is appreciated,
Hazem
