FPGA Butterworth filter -- not working

[dotadk]

Hey all,

I have an NI 9223 AI connected to a detector, sampling at 250 kS/s, and I try to perform filtering on the incoming data. The cRIO is continuously sampling. The incoming data has a period of 100 ms. I have two implementations, one is working (FPGA_I1), the other one is not (FPGA_I2). In the case of FPGA_I1, I'm filtering all the incoming data, and sending it to the RT Host, using a FIFO DMA. On the RT host I'm not interested in the whole batch of data, but only in the data representing 33 ms at the center of each 100 ms period. So in FPGA_I2 I'm filtering and sending only this data. In both versions the filters have the same parameters, but I'm missing something (clearly) since FPGA_I1 performs the filtering, while FPGA_I2 does not. 

Both implementations use a producer-consumer design pattern, and the hot stuff happens in the consumer. 

I'm attaching the two versions.

Any help is much appreciated! 

Thanks! 

[A.Rohde]

Hi dotadk

You have a lot of coersion dots in your fixed point calculations. All the red dots on the input to the different nodes means that a truncation or coersion is being made. This could cause a behavior where the data is not showing right.

Looking at FPGA_I2 in your producer loop under send to process you have a coersion dot after "Scaled Window" on the Select function. One input is <32,7> the other one is <32,5>. There is also a Coersion dot on the FIFO2Host FIFO. 

Try to remove all of these coersions in the program and see if this solves your problem. If not we can try to extend the debugging, but let's first get this right.

Best Regards

Anders Rohde

Applications Engineer

Natioanl Instruments Denmark