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FPGA Data logging

Hello

I m using a CRio9074 and NI9215 module. I implement the exmple for fpga data logging given at http://www.ni.com/white-paper/11198/en/.

I 've just conected a DC signla one channel and the program does not show anything or noise. I attach the project. Can somebody help ?

Thanks

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Hi user,

 

do you get any errors while the program runs? Did you debug it?

 

Where is your data saved? I hope you don't expect the cRIO to save a file on your (Windows?) PC harddisc…

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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Hi

Initially, I got an error ragarding the tdms path but now I change the path to c:\Inputs.tdms (the mistake you said aboveSmiley Happy ) . Since then the program runs but the readings seem to be some random values which are the same for all the channels even if I don't give input to all of them.

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