FPGA: HDLC example from NI

[engwei]

Hi,

I m currently develop my very first FPGA project by using PXI-7954R. SPI and SDLC to be developed by using this card. 

I have referred to HDLC example from NI 

HDLC Implementation in LabVIEW FPGA

http://zone.ni.com/devzone/cda/epd/p/id/5339

and I have found the state machine only run the initiate state by default. It is left purposely or the authour forgot to

add the state sequence.

And, what is the proper sequence for this example ?

Your comments are much appreciated. Thanks in advance 

[lhaoxian]

Hello engwei,

I believe this VI that you have screenshot-ed is a Functional Global Variable (FGV). It stores data in shift registers (making use of the While Loop to do so), and a TRUE constant is being wired to the Stop terminal. Thus, this VI is meant to be run once every time it is called.

My guess is that this VI is called as a subVI from your main VI. The first time you call this VI, you input the "Initialize" state. Subsequent calls to this VI will require the input of the other states.

Best regards,

Victor

[engwei]

Hi Victor,

I see. Thanks a lot !

BR, engwei