FPGA - Multirecord Acquisition for 4 Channels

[Arbores]

Awesome!

I am assuming I have to create new DRAM for every channel as well? 

What about the reg.host instructions fifo? Another 3 sets? 

thanks!

[Terry_ALE]

DRAM yes, reg.host instructions fifo no.

[Arbores]

Hello again,

Any idea on why I am getting this “

Details:

ERROR: [Place 30-640] Place Check: This design requires more Slice LUTs cells than are available in the target device. This design requires 279312 of such cell types but only 203800 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device. Please set tel parameter

"drc.disableLUTOverUtilError" to 1 to change this error to warning.”

thanks!

[Arbores]

Hello Again,

One of the things I don’t understand is that what do I need to do for the memory size, the DRAM size as well? I need 4 and I don’t know how to break the size and all. Any help on this is appreciated.

Thanks!

[Terry_ALE]

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@Arbores wrote:

Hello Again,

One of the things I don’t understand is that what do I need to do for the memory size, the DRAM size as well? I need 4 and I don’t know how to break the size and all. Any help on this is appreciated.

Thanks!

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Make the existing DRAMs smaller by a factor of 4.  Then make 3 more copies.

BRAMs stay the same size (I do not have experience with making this smaller).