06-02-2014 10:57 AM - edited 06-02-2014 10:57 AM
Hi there,
I think this may have a simple fix. I'm using FPGA to control a motor using an NI 9501 and a cRIO. Normally, any time you save changes to the FPGA VI you have to recompile the build. However, when I open the FPGA VI and simply look at the block diagram, it asks me to recompile before I am able to run the VI. I'm not making any changes to the VI, nor saving it. It just seems the simple act of looking at the block diagram of the FPGA VI forces me to recompile, which is a little annoying when I'm trying to make sure my FPGA code is correct (and compiling on my system is taking over half an hour each time).
Thanks in advance.
06-02-2014 11:42 AM
Did you update drivers since you last saved the VI? Did you change a subVI since you last saved the VI? Those are the two big ones I see.
06-02-2014 01:10 PM
Neither of those. For example, I will compile the FPGA VI and the compile will complete. I'll can open the VI's front panel, open it, run it, close it, all without any issues or being asked to recompile. However, if I open the FPGA VI and go the block diagram and do literally nothing other than look at the block diagram (no interaction other than looking at it) and close the VI, it will ask me to recompile. It's kind of a head scratcher for me because it doesn't make sense to me why, if I did not alter the VI at all, why it asks to me to recompile.