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FPGA: Reconnecting to compilation starts generating intermediate files

Hi,

 

I am creating FPGA codes on LabVIEW that take hours upon hours to compile and I leave the compile running overnight on the cloud compile service -server. I disconnect from the compile and shut down my laptop when I leave for the day and reconnect to the compile the next day. My problem is that sometimes when I push "Reconnect to compilation" LabVIEW starts generating intermediate files and when it's done, starts the compile again. Why is this happening? How can I prevent it? It is really annoying because the compilations take a long time to finish.

 

I am running LabVIEW 2019 sp1 32-bit.

 

Thanks

Aarni

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