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FPGA Sampling problem

Here you go !

 

Using FIFO is what you should do. But you should check "Timeout ?" like in the example to check if you are losing data or not.

Jérôme Henrion | ONERA - Digital RF Engineer | CLA | CTA
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Message 11 of 12
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hey !

 

is my program on my pc correct ? (see attached), because i put a sineweve in the AI0 but nothing appear on the graph 😕

 

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Message 12 of 12
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