Hello Group Members:
I have this working startup.rtexe app, built from a Top level RT-HOST VI that includes an FPGA Target SubVI
PROBLEM
-- I needed to change a simple data averaging routine in the Top level RT-HOST VI program.
-- Thus, nothing changed in the FPGA subVI hosted by that top Level VI.
-- From the above, I reasoned that the FPGA bit file remains the same, and thus no need to re-compile.
CHALLENGE
Now, the working hardware controller comprised of cRIO-9063 platform, and a cRIO-9381 Malfunction DAQ plugin modul, was already deployed at customer site. So was not available for software deployment from LabVIEW.
UPDATE PROCEDURE USED
-- To Update the system I simply re-Compiled the startup.rtexe app within LabVIEW project
-- The RT-HOST VI (modified) was the top level and the same old FPGA subVI was included
-- I then logged into the cRIO-9063 controller using an FTP program (Filezilla). And Navigated to the path: /home/lvuser/natinst/bin/....
-- To avoid overwriting the existing startup.rtexe app, I made sure to rename that app to startup_00.rtexe
-- I then copied over the New startup.rtexe file there.
RESTARTING the startup.rtexe app
-- To re-Start the new startup.rtexe app I rebooted the cRIO-9063 by disconnecting DC Power to the unit, counting 5-sec, and reconnecting AC DC power back.
PROBLEM
-- The RT-HOST VI startup.rtexe app ran OK because I was able to login to the TCP_Server contained in the RT_HOST VI and data was being streamed from-it.
-- However the FPGA subVI was NOT running because all IO signals were 0 and a counter number was defaulted to 0, instead of the expected initialization number of 10000000.
REVERTING BACK to OLD startup.rtexe App
-- To revert, I just deleted the new startup.rtexe app and renamed the old startup00.rtexe back to startup.rtexe.
-- I then cycled power to the controller platform and everything resumed working OK.
QUESTION
For a cRIO system with FPGA SubVI, that is already deployed at customer site, how can one manually and successfully update the startuo.rtexe app that contains an FPGA subvI and ensure that the startup.rtexe app will stay running for both the RT-HOST VI and the FPGA Target subVI?
Anthony L.
