02-12-2016 10:00 AM
Hello. I am using the R Series PCIe-7852R FPGA card. I have a problem with finding out the frequency of the TTL input. I have a resonant mirror with the 16kHz frequency with the TTL square wave as a reference signal. I would like to measure the time between two consecutive rising edges. If I understand correctly, this should give me the 16kHz frequence of the rising edges. I tried to use the example 4. found here:
http://www.ni.com/white-paper/14549/en/
However, my example finder in labview is missing the Count and Period – cRIO.lvproj example. I tried to follow the block diagram, but somehow, the result I get is not as I would expect it to be (16kHz). Please, tell me if I do something wrong. I attached the vi I wrote. There are also some other inputs and outputs I will need, they do work as I expect them to work.
02-12-2016 05:56 PM
I typically just keep adding up ticks until I get the edge I am looking for. Then I let the host do the math of taking the period in FPGA clock ticks into an actual frequency (F = 40MHz/period (ticks) ).