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FPGA fixed point logical shift

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Greetings all,

 

I apologize in advance if this topic has been addressed, I couldn't find anything after searching.  

 

I have a fixed point number <+/- 13,13> which goes from -4096 to 4095.  I would like to divide that by 2048, which happens to be a very simple bit shift operation.  If you keep the word and shift the q-point to cast it as <13,2>, I get the answer I'm looking for.  

 

This works outside of an FPGA, but the type-casting block is not FPGA-compatible.  

 

The 'logical shift' block help documentation says to use the 'scale by power of 2' block with signed data types, however when fed with a <13,13> fxp source it outputs a <13,13> fxp, so I just lose all of the fractional bits.  

 

Is there some way to re-cast (and be compatible with FPGA) the fixed point variable such that the word isn't changed but the virtual q-point gets moved?  I can accomplish it with a 'high throughput divide' block but that seems like overkill for a simple shift scaling.

 

This is a super simple / common operation so I must be missing something.  In other languages this would be trivial.  Any thoughts?

 

Thanks in advance,

 

Chris

 

 

EDIT:

 

About 5 minutes after posting the question, I figured it out.  Isn't that the way it always goes?

 

Anyways, for those that see this when looking in the future, I used a 'convert number to boolean array' connected to a 'convert boolean array to number' blocks, and you can set the output format of the 'convert boolean array to number' block to whatever fixed point format the heart desires.  

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Accepted by topic author chris2222

Using the Boolean array method will certainly work, but if going from FXP to FXP, there's also the "Reinterpret FXP" node which does the came thing.

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That's EXACTLY what I was looking for, not sure how I couldn't find it.  I know where it is now, though, so all is (briefly) well in the world.

 

Thanks for the assist.  

 

 

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