FPGA: global variables vs. front panel items

[M.haefner]

Hi,

I´m currently trying to optimize my FPGA-code. According to the help documents one can save recources if one replaces front panel items (indicators, controls) by global variables. In my particalur case I want to transfer data (16bit FXP) from one SCTL (100MHz)  to another SCTL (40MHz). That works fine with writing to an indicator in the fast SCTL and reading a local variable in the slow SCTL. When I replace the indicator (and local variable) by a global variable I would expect the resource utilization to drop. In my case the registers are decreased by 76 and LUTs by 46. Nevertheless the design needs 43 slices more. So the slices are used less efficient in the case of global variables. I'd like to know, if that behaviour can only be observed in certain situations or if it is a more general thing. From what I observed I cannot see any advantage in using global vars. within a single VI.

Regards,
Matthias

[christian_w]

Spoiler

According to the help documents one can save recources if one replaces front panel items (indicators, controls) by global variables.

As far as I know that recommendation is only for the FPGA main VI, where the Front Panel elements are used for the Host communication. Panels from FPGA sub VI's should be removed by default. If you reference your global var in more than one FPGA VI, the use inside a SCTL may lead to a compiler error.

Hope it helps

Christian

[M.haefner]

Hi Christian,

thanks for your reply.

Maybe I was not clear enough, but I am only speaking of the top level VI's front panel elements. I only reference the global vars from the top level VI as well. My question was rather about compiler efficiency than about errors. As I explained, it seems to be better to use front panel elements instead of global vars in terms of slice usage.

(Btw. I use Labview FPGA 2010)

Regards,
Matthias

[christian_w]

According to this presentation (page 34) the only reason to use the global variables is the lack of a frontpanel.

ftp://ftp.ni.com/pub/branches/germany/vip_2010_downloads/do/fpga-basiertes-systemdesign/07_zwick_ni_...

If you need more resources with globals on a top level VI, re-check the fixed point definition (you mentioned 16bit) of your global variable.

Hope it helps

Christian

[M.haefner]

Hi Christian,

I don't know if you are German native speaker (I am), but the sildes you posted confirm what I said and what is also written in the help documents under the topic: "Optimizing FPGA VIs for Speed and Size"

Headline: "Limit the amount of front panel objects"

1st: "Each front panel object of a Top-level-VI" need logic for Host-VI-interaction"

2nd: "Use global vars instead of local vars. Global vars don't have front panel objects" (That is why I wanted to use them)

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.

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The data type of my global is definitely the same as of the front panel element

Regards,

Matthias

[RamonaL]

Hi Matthias,

the frontpanel objects are generally only there to communicate with the host VI. To comunicate on the target there are other methods designed for that. Thats the theory.

I would recommend you to use the global/memory/Fifo on the target. That makes it also more readable. But in the end you will always have to benchmark it, to find the best solution for you.

I hope that helps a bit,

RMathews