FPGA

[vbs]

Hi, I am trying to access a FPGA I/0 from the RT side using the Read/Write Interface, but it is not visible.

I have the same code in LV2011 and it is visible but in my LV2013 I can't see the FPGA I/O using the Read/Write Interface node.

Anyone facing the same issue or am I doing something wrong .. Please help.

Thanks

[NapDynamite]

Dear vbs,

You must out the FPGA reference outside the stacked sequence ( and a while loop ), first. Second, have you tried extending this I/O control icon downwards? May be you will see the remaining I/Os. 

Regards.

[thoult]

There's a coercion dot on the FPGA VI Reference Out terminal, which suggests one source of a problem.

Try deleting the FPGA reference constant within the loop and creating/wiring a new one to the method node.

I've had similar issues over the last few days, and the following describes it a little bit:

http://zone.ni.com/reference/en-XX/help/371599F-01/lvfpgahosthelp/fpga_dynamic_host_interface/

[vbs]

I am suspecting that FPGA I/O cannot be accessed using the Read/Write Interface control.

Because no mater what I do I can't access FPGA I/O.

[T-REX$]

What is your "Open FPGA VI" function pointing to? If you have it pointing to an old bitfile, that would be an expected source of this behavior... especially if it's pointing directly at the old 2011 version of the bitfile.

[vbs]

I use the vi file as the reference not the bitfile. And it is the latest FPGA vi file (other controls that I add do show up in the Read/Write interface, only the FPGA I/O controls are not showing up). I have attache an image of the open FPGA configuration.

[T-REX$]

Any chance you can post the whole project (zip) instead of just screenshots?

[vbs]

Sure.. I have attached the project.

RT_Init_Task.vi has the FPGA open interface and the Read/Write Interface control (which is my issue).

Thanks

[T-REX$]

Hmm... ok, I'm going to have to look at this one a bit more. Have you tried generating the intermediate files for your LabVIEW FPGA code recently (i.e. do you get the same error I do)? Did you upgrade this code from the 2011 project, or re-create it in 2013? If you still have the 'working' 2011 code, could you please post that as well? It looks like your FPGA VI is in a bad state, and I'd like to figure out how it got there.

[vbs]

I do not get any errors when I compile the code here. But I can try to start a new project and transfer this code and see if it helps.