04-30-2016 04:56 PM
This is my first time using a forum for questions so excuse my awkward presentation.
to be short I wokred on a VI for a while with the intention of generating the output which is a continious signal ( a power quality disturbance simulator) using a USB daq only to find out that the daq I had (6009 usb) is not suitable for such applications so I moved to using a PCIe 7851 only to be overwhelmed with the whole process of using it.
I have gotten the hang of using the FPGA module to do simple tasks but my question here is if it is possible to output a signal from an other VI using the FPGA,if yes how is it done? an example would be perfect otherwise a push towards the right direction like a toturial would be enough
Thanks in advance
05-02-2016
10:33 AM
- last edited on
01-10-2025
10:24 AM
by
Content Cleaner
Hi rofaalla,
This page has a good overview of general FPGA programming concepts. I think section three in particular on using analog inputs and outputs will be most helpful to you.
"Getting Started With LabVIEW FPGA"
https://learn.ni.com/learn/article/getting-started-with-fpga
I'm afraid I don't entirely understand what you mean by outputting a signal "from another VI" using the FPGA. Could you please elaborate on this some more? What VI do you want to use, what is it's purpose, how is it structured etc. that would be helpful in giving you some more specific steps. Do you want to call another VI as a subVI from within your FPGA VI?
From what I understand of your setup so far, I think you should be able to get the FPGA to output your signal by creating a new FPGA VI, that follows the same logic as the one you were using for the USB 6009, but instead of using the DAQmx VIs, use the FPGA analog outputs to output the signal you generate as explained in the link above.
Thanks!
05-08-2016 05:59 PM
05-08-2016 06:09 PM
We honestly can't tell you what will and won't work with the VI you've already created. We know nothing about it. Did you use doubles? If so, you can't implement that on the FPGA. FPGA can use SGL or FXP, but not DBL.
If it's straightforward, you'll likely be able to replicate it quicker than you can find a way to transition it to the FPGA unless it'll work to simply drag it under the FGPA portion.
If you want this VI to continue to do the work, you're going to run into problems similar to what you were seeing with the 6009. Doing the computation in a Windows based OS and then outputting the results causes issues. You'll be better off doing this work on the FPG itself and letting it handle all of the work. Can you send it to the FPGA so that it gets sent out? Yes. You'll use a combination of FIFOs and registers to pull this off. You may even have to load it into the DRAM if you're making a large enough signal.
05-09-2016 06:53 AM
Thank you for the reply, I have attached my VI, it is very messy and the structure is counter intuitive to an extent but I think it'll be enough for you to see what I'm going for (there is a portion of the diagram that relies on Mathscript tool but I can work around it without having to use Mathscript)