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How to synchronize FPGA and RT?

Hi all,

I am using crio 9076 with followinf modules: 9234 and 9263. I need to synchronize FPGA and RT working at same frequency which is about 2000 kHz. I am using FIFO as communcation method between FPGA and RT. Is that possible? And how it is possible? What method should I use?

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Message 1 of 10
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I presume you mean either 2000 Hz or 2 kHz...... if you really want 2000 kHz (2 MHz) then I'll let others answer.... Smiley Very Happy

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Message 2 of 10
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Hi,

 

Sorry I meant 2000 Hz. Do you have any solution?

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Message 3 of 10
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In our RT Application, we use a read timer for the FIFO read together with whether items are still left in the FIFO or not to essentially run off a timer to keep both RT and FPGA synchronised.

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I appreciate that my post helped, but I'm busy with my own workload.... If you ask specific questions, I'm sure people in the forum will be more than willing to help.

 

>clarification< Response to Private Message

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Is it possible to get more on the application?

Do you need to lock phases of input and output data?

 

In general, I would to get the FPGA to do all the timing/sync and let the RT collect and manage things.  Is this possible in your case?


Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
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Hi,

 

Well that is all what I try. FPGA works as hardware/ software and RT is place where I do calculation. The case is as following: I have input and output modules and I run the FPGA for 2000Hz. The input modules works well. Howerver I need RT working as fast as FPGA because I am creating the controller in RT, which is closed loop, which mean it is using the data coming from FPGA therefore it should works at same rate...

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Can the algorithm be put on the FPGA?

On RT, are you using a timed loop?

 

Have you reviewed http://www.ni.com/compactriodevguide/?


Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
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Message 8 of 10
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In PFGA I am using While loop and in RT timed loop. I have red this guide few time Smiley Embarassed . Still can not solve the problem..

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Message 9 of 10
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Can the algorithm be put on the FPGA?


Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
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