02-12-2018 06:25 AM
Hi all,
I am using crio 9076 with followinf modules: 9234 and 9263. I need to synchronize FPGA and RT working at same frequency which is about 2000 kHz. I am using FIFO as communcation method between FPGA and RT. Is that possible? And how it is possible? What method should I use?
02-12-2018 07:02 AM
I presume you mean either 2000 Hz or 2 kHz...... if you really want 2000 kHz (2 MHz) then I'll let others answer....
02-12-2018 07:04 AM
Hi,
Sorry I meant 2000 Hz. Do you have any solution?
02-12-2018 07:14 AM
In our RT Application, we use a read timer for the FIFO read together with whether items are still left in the FIFO or not to essentially run off a timer to keep both RT and FPGA synchronised.
02-12-2018 07:43 AM - edited 02-12-2018 07:59 AM
I appreciate that my post helped, but I'm busy with my own workload.... If you ask specific questions, I'm sure people in the forum will be more than willing to help.
>clarification< Response to Private Message
02-12-2018 08:16 AM
Is it possible to get more on the application?
Do you need to lock phases of input and output data?
In general, I would to get the FPGA to do all the timing/sync and let the RT collect and manage things. Is this possible in your case?
02-12-2018 08:23 AM
Hi,
Well that is all what I try. FPGA works as hardware/ software and RT is place where I do calculation. The case is as following: I have input and output modules and I run the FPGA for 2000Hz. The input modules works well. Howerver I need RT working as fast as FPGA because I am creating the controller in RT, which is closed loop, which mean it is using the data coming from FPGA therefore it should works at same rate...
02-12-2018 08:29 AM
Can the algorithm be put on the FPGA?
On RT, are you using a timed loop?
Have you reviewed http://www.ni.com/compactriodevguide/?
02-12-2018 08:31 AM
In PFGA I am using While loop and in RT timed loop. I have red this guide few time . Still can not solve the problem..
02-12-2018 08:35 AM
Can the algorithm be put on the FPGA?