09-01-2023 11:50 AM
Hello
I am trying to trigger a piece of HW with a signal from another HW. The trigger a train of square pulses at around 1000 Hz. So I want to write a new point each time a pulse in the trigger train comes up. I would have thought it would a simple problem to solve, see picture attached, but for some reason I can only manage to trigger once and it just keeps running at the rate of the Sample Clock. I cannot use retriggereable because otherwise I need to specify a finite amount of samples, and I need this to be running non stop. I can not use the HW trigger as the sample clock because I need to adjust the delay with a precision of 10 microseconds.
I get the feeling I am missing a basic yet obscure reasoning of the sample clock and triggers. Any guidance here?
Note that I have to use “Convert Late Errors To Warnings Property " to avoid this error.
Solved! Go to Solution.
09-01-2023 12:11 PM
The Hardware-Timed Single Point Mode is not meant to be used to generate a sample clock on each trigger. Instead, it is a sample clocked with a single buffer.
Based on your requirements, you can just simply configure your sample clock timing to use an external signal. Instead of the default onboard clock, just specify the PFI port of the external clock signal as the clock source of the Configure Sample Clock Timing VI.
09-01-2023 01:35 PM - edited 09-01-2023 01:41 PM
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09-01-2023 01:41 PM
@ZYOng wrote:
The Hardware-Timed Single Point Mode is not meant to be used to generate a sample clock on each trigger. Instead, it is a sample clocked with a single buffer.
Based on your requirements, you can just simply configure your sample clock timing to use an external signal. Instead of the default onboard clock, just specify the PFI port of the external clock signal as the clock source of the Configure Sample Clock Timing VI.
Hello @ZYOng,
Thank you for your response. So I use my HW trigger as clock, and I also keep the HW trigger? Would that work correctly? I still need to create a delay between the trigger and the writing so I can synchronize both HWs.
Is there another way to introduce a delay between the sample clock and the writing with a resolution of 10 microseconds? Would the high resolution polling wait be accurate/ stable enough?
09-01-2023 03:44 PM
@cmacrom wrote:
@ZYOng wrote:
The Hardware-Timed Single Point Mode is not meant to be used to generate a sample clock on each trigger. Instead, it is a sample clocked with a single buffer.
Based on your requirements, you can just simply configure your sample clock timing to use an external signal. Instead of the default onboard clock, just specify the PFI port of the external clock signal as the clock source of the Configure Sample Clock Timing VI.
Hello @ZYOng,
Thank you for your response. So I use my HW trigger as clock, and I also keep the HW trigger? Would that work correctly? I still need to create a delay between the trigger and the writing so I can synchronize both HWs.
Is there another way to introduce a delay between the sample clock and the writing with a resolution of 10 microseconds? Would the high resolution polling wait be accurate/ stable enough?
You can simply just insert 10 samples of zero value before your actual waveform.
09-02-2023 05:44 AM - edited 09-02-2023 05:44 AM
@ZYOng wrote:You can simply just insert 10 samples of zero value before your actual waveform.
But that wouldn't work. My clock would have a 1 ms resolution (my HW trigger is 1 kHz as mentioned before). I need 10 us. Plus I would have to run two writes after each other to avoid having the padded zeroes in my main signal. I would think there should be a proper way to do this.
09-04-2023 01:19 AM
Hi cmacrom,
@cmacrom wrote:
Would the high resolution polling wait be accurate/ stable enough?
No, not on Windows…
(When asking for 10µs resolution: what is your required accuracy?)
09-04-2023 02:55 AM
@GerdW wrote:
No, not on Windows…
(When asking for 10µs resolution: what is your required accuracy?)
Hello @GerdW,
thank you for your reply. Any idea what would be the limit? I am not even sure that idea would still work anyway... wouldn't the write function need to be called first so that it can be triggered? I wouldn't be able to to put a "wait" in between.
Would you happen to have any other ideas? I tried a brute force approach before using a counter to enable case structure when the counter changed, followed by a high res wait for the delay. There was too much jitter.
I find it odd that it is not possible to trigger continuously a write function sample by sample.
09-04-2023 05:08 AM
Hi cmacrom,
@cmacrom wrote:thank you for your reply. Any idea what would be the limit? I am not even sure that idea would still work anyway...
When asking for accuracy I just wanted to hint to the jitter you will always see on a Windows system…
@cmacrom wrote:
I find it odd that it is not possible to trigger continuously a write function sample by sample.
Atelast for AI tasks you can define an internal (or external) sampleclock (when the hardware supports such clocks). I guess you can also define such sampleclocks for AO tasks…
As has been said before: use a sampleclock as fast as needed: for 10µs resolution you will need 100kHz.
Then it boils down to output the correct waveforms…
09-04-2023 09:28 AM
Counters to the rescue! An intermediary counter task will let you generate a delayed 1000 Hz output in response to the 1000 Hz input, with a sub-microsec delay resolution!
I'll assume all active high signals for the discussion, you can adjust if needed.
1. Configure a counter task with both low time *and* initial delay set to the delay time you want -- let's say 170 microsec.
2. Set high time to be less than the remaining time per msec. In this case, definitely less than 830 microsec. But frankly, I'd make it as short as necessary for whatever the external device needs. Maybe that's 10 microsec or less.
3. Set the counter task to be retriggerable, using the external 1000 Hz signal as the trigger.
4. Configure AO to use the counter output as its sample clock, active on rising edge.
5. Start the AO task *before* you start the counter task.
Delay resolution will be 1 cycle of the device's timebase -- which will likely be either 10 or 12.5 nanosec depending on the specific device. Very old ones might be 50 nanosec.instead.
-Kevin P