LabVIEW
MAX31685 Interface on myRIO
Solved!
Please do not use Stacked Sequences! In fact, unless you are doing FPGA code, you almost never need the Sequence structure. Use the Error Line to serialize your VIs.
It also really helps to think hierarchically and plan sub-VIs to "hide the messy details". Here are three illustrations of sub-VIs I created for the 8451 to handle A/D conversion on a different chip. I'm only presenting "pictures", but with explanations that explain how it works and what you might want to change.
Do you know about VIG's (stands for Virtual Instrument Global, a "do once and remember for future use" routine)? This VIG "finds" the 845x device, sets up SPI, and returns (for subsequent use) the Device Reference and the SPI Configuration Reference. This is called "NI-845x SPI Refs" (you'll see it as a blue box on later pictures).
Notice the "First Call?" function that runs the outer Case structure when you first call this VIG. The little blue sub-VI "Find SPI Master" is pretty simple-minded -- it queries VISA for any device whose names starts with USB and if it finds exactly 1, it says "This must be the SPI Master". You could easily substitute a Constant Device Reference here. Notice that this sets up the SPI configuration and does it once (because First Call? is only true once).
Before doing A/D conversion, you have to configure the A/D Chip. For my chip, this requires a one-byte command (which I build out of bits, why not?). Since the SPI Read/Write requires an Array input, I make the single Byte into a 1-Byte Array, when send it to SPI Read/Write. Note that the Close Reference is not necessary.
To read from the A/D, you need to send two "Commands" -- a Convert command (which is, in my device, another single-byte command, which you can see I put in the appropriate bits by doing left-shifts using the power-of-2 function), followed by a "Read", produced by writing as many bytes as you expect to read back, and then reading them back.
I hope this suggests a clearer way of constructing your code to do similar things with your SPI A/D chip. Again, do not use Stacked sequences without Error Lines -- it makes following the logic difficult. Do use sub-VIs to "hide the messy details".
Bob Schor
