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Memristor I-V graph with DMM and Signal Generator

Hi,

 


@fnaticyususf wrote:

When we try to keep it outside, the connections we built are getting broken.(Error:wire is a member of a cycle).
Can you show me what you want to say if i send you the block diagram?


I don't understand your problem:

Where is your "circular wiring" error?

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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