Pre-Triggers in FPGA

[Arbores]

Hello all,

I hope all is well. 

Anyways, I don't know anything about pre-triggers in FPGA. Don't judge me because I am knew to this. 

What is Discrete Delay? Can this VI used to get your pre-trigger data before you pass it to your fifo? 

Do anyone has an example on how to get pre-trigger data and the number of samples? 

Thank you,

Arbores

[Terry_ALE]

Which NI hardware are you using?  I ask because some have it as part of the FPGA VI.

How large of a pre-trigger are you looking for in terms of number of samples?  The maximum size will dictate how much memory will need to be allocated.

FlexRIO such as 5785 and Reconfigurable Oscilloscopes 517x have pre-trigger in the FPGA VI.

[Terry_ALE]

Discrete Delay can be used to make a pre-trigger (as a delay is the basis for pre-trigger).

It is similar to feedback nodes but uses different resources and has more flexibility.  See https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/lvfpga/ht_discrete_delay.html

Since you are starting out, discrete delay function may be on the advanced side.

[Arbores]

the hardware is a 5172 PXIe.

I would like it to handle at least 1,000 pre-trigger samples if possible.

Thank you!

[Terry_ALE]

Yes, it can be supported.  See posting here (things are converging): https://forums.ni.com/t5/LabVIEW/FPGA-Multirecord-Acquisition-for-4-Channels/m-p/4334896/highlight/f...