06-25-2009 03:57 AM
Hello,
I am trying to make an "old" software based on Labview 7.1, RT7.1, FPGA 1.1, SIT 2.0.3 work under the current software version (Labview 8.6.1, RT 8.6.1, FPGA 8.6, SIT 5.0.1) and I have problems concerning the SIT model.
The simulink model (Matlab R13sp1 and Visual C++ 6.0) has been recompiled with the new NI softwares. It seeems that there were no problem during the DLL generation.
As i didnt need to interact with the model i used 5 years ago the following principles :
Load the model in the DLL with SIT_Initialize_Model
Call a TimedLoop at 488 us doing :
Load the new model inputs (sent by another timeloop throught RT fifo, data coming from files loaded in memory)
Load from the FPGA various data such as realtime position, speed extracted from Rs422 databus
Send all those data to the vi SIT_STEP_MODEL
Get the output and send them back to the FPGA for command output (voltage)
Store every model output in a fifo and once test is over everything is written onto the target hard drive
Finalize model when test sequence is over.
When i use the corresponding functions with the SIT 5.0.1 (Vi names have changed a bit but it still seems to be doing the same) it seems the model is not running (outputs are always 0).
Does anybody have ideas about the problem?
Does this way of using the SIT DLL without SIT server is still possible under the new software version ?
Thanks for your help,
07-02-2009 10:16 AM
Hi ,
I invite you to contact your local NI Technical Support Service by phone.
The phone number for the france is 0157662424.
Regards
Yann C.
France
07-02-2009 10:35 AM
Hello,
I have already contacted the french support...
I think i found what the problem is. There seems to be a limitation in the size of inports. I created a very simple model (inport to outport) to check this and here are the results :
if the model uses an input (array of 4 doubles) the outport is the copy of the inport.
if the model uses an input (array of 5 doubles) i always have 0 in the ouport.
In my case the model has 11 entries in three inputs (under simulink), one input is an array of 9 doubles and the others inputs are single element doubles. Every data written in the array is not "seen" by the model while the two single element inputs are working well.
Is there a limit in the size of an input (here it seems to be 4) ? (I'm not talking about the number of inputs but the size of an input)
Thanks for your help,