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SERDES CLIP in External clock data Acquisition in Flex RIO

Can anyone explain the detailed structure of an SERDES Connector CLIP

in LabVIEW programming Flex RIO.

 

Additionally,

  1. How do the acquisition bits get arranged, with respect to each Channel Data?!
  2. How does the samples to be read considered?!!!
  3. If I have 16 LVDS Channels, how can I acquire each channels data considering each Lane to reconstruct separately.

Note: 

I have seen examples and stuffs related to flex-rio programming but there's no particular explanation for this CLIP, Where things go in deep with high importance.

 

KT is worth it!! Cause you are storing things permanently in your Brain Smiley Wink

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