Stop FPGA execution in Ethercat

[TapTap]

Hello

I would like a piece of advice about how I can stop the code execution in FPGA in etherCAT chassis. I work on a piece of code where I start the VI in a RT computer and the FPGA produce PWM puses with a difital module. However, stopping the main VI, the FPGA is still working giving pulses with the NI module. I'm trying to send a stop command from the main VI to the FPGA without success. Is there any specific type of command to communicate with the FPGA in etherCat ?

Note that the initial code is not made by me, so I don't have fully control of it.

Thanks for any help !

[A.Rohde]

Hi TapTap

Do you have both the RT code and FPGA code?

I'm a little unsure from you post if you only have the RT side and can't change anything on the FPGA? 

Normally you could just use a User Defined Variable and hook it up to the FPGA and RT side (remember to compile the FPGA), and remember to initialize it to false at beginning of execution)

Br, 

Anders