The difference between USRP and USRP bitfile in the compilation and running of bitfiles for FPGA VIs

[chenkd]

I am using LabView Communications Design Suite 2.0 and USRP-2954R for FPGA implementation. I am now  going to modify the FPGA VI of the BW 120MHz streaming template. After I modify the FPGA VI and build the bitfiles, I always find that they do not effect. So, when I have a close look, I find there is a option on USRP and USRP bitfile. It seems that a same VI has 2 files as attached. 

Secondly, I found the probe sampling seems not working properly. In the LabView Comms Suite, all the clock driven logic-related VIs are created as cdl files. It seems that I can not probe a clock signal and relate it to a signal of interest.