01-03-2022 03:03 AM
Hi,
I am using PCI 7831R DAQ card. I am trying to generate a triangular waveform as an output from this card using labview 2016.
Kindly suggest a solution as the triangular wave form option is not available on the FPGA target VI. How can I make the triangular wave form.
Waiting for response
Ekansh Garg
CSIO
Solved! Go to Solution.
01-03-2022 03:47 AM
Hi Ekansh,
@EKANSH_CSIO wrote:
How can I make the triangular wave form.
A triangular waveform consists of ramps between min and max: you just need to interpolate between your min/max values over time (or iterations of your FPGA loop).
What have you tried and where are you stuck? Mind to attach your code?
01-05-2022 11:29 PM
Hi,
Basically i want a sawtooth wave signal from my FPGA analog output pin, for which time and amplitude can be controlled in real time from lab view. Here is my code and snippet.
Please tell what am I missing out.
Waiting for you response.
Thanks
Ekansh,
CSIO
01-06-2022 12:37 AM
01-06-2022 01:05 AM
Hi
I am facing the same challenge with the sawtooth generation on the fpga.
The above resources are in accessible when I tried to access them.
Here is the snippet of what I attempted to do.
01-06-2022 11:25 PM
Hi again,
Is there a way to directly control and send sawtooth signal in real time to the FPGA I/O PIN from my VI (which is on host PC) in order to avoid repetitive code compilation on the FPGA target, as currently I am in development phase of the code . Is there a way to do so?
Best regards
Ekansh
CSIO
01-07-2022 05:59 AM
Please suggest a solution of how can I generete a sawtooth signal on the FPGA I/O PIN directly from the host VI in the real time, to avoid repetitive compilation on the fpga target.
01-07-2022 06:14 AM - edited 01-07-2022 06:24 AM
Hi Ekansh,
please don't hijack (very) old thread when you already started your own discussion thread!
Keep related posts in just one thread!
@EKANSH_CSIO wrote:
Is there a way to directly control and send sawtooth signal in real time to the FPGA I/O PIN from my VI (which is on host PC) in order to avoid repetitive code compilation on the FPGA target, as currently I am in development phase of the code . Is there a way to do so?
Why do you need to compile "repetitive"?
As I suggested before: create the sawtooth signal inside the FPGA VI using simple math functions!
The FPGA only needs 3 inputs: min + max of the sawtooth signal and number of clock cycles for a full period.
I recommend to use FXP datatype: use the same FXP definition as is used by the AO pin…
I'm used to cRIO AO modules which use FXP datatype. As your device uses I16 you need to scale/round from FXP to I16…
02-03-2022 06:11 AM
Hi there again, I managed to generate triangular wave form, Thank you.
Now I am using a time delay inside a loop which is generating the wave form, but a little change in the time delay results in abrupt change in signal frequency. I am guessing this is because time delay function cannot take decimal values so it reads them as 0.
So,
1)Can Time delay read values in decimals.
2) Is there a delay option fro values in micro second.
I have attached my code below
Warm Regards
Ekansh
CSIO
02-03-2022 07:06 AM - edited 02-03-2022 07:17 AM
Hi Ekansh,
@EKANSH_CSIO wrote:
Hi there again, I managed to generate triangular wave form,
Did you do any of those basic LabVIEW training resources to actually learn LabVIEW and DATAFLOW?
Why are there so many local variables?
Why are there sequence frames when DATAFLOW should be used?
Why are there wrong datatypes, like orange wires where blue wires are expected?
See this:
No locals, no frames, just dataflow! (This will still not work as expected due to your other problems.)
@EKANSH_CSIO wrote:
1)Can Time delay read values in decimals.
2) Is there a delay option fro values in micro second.
Does your VI run in the RT host or in the FPGA target?
Why do you create the waveform in the RT host, when you should do that (much better/more accurate!) in the FPGA target?