I have built a some RT code with FPGA code also. the project has been building and running fine until i added two channel wires, tag and message. When the RT tries to build it throws a "VI broke during the build process from being saved without a block diagram...". It seems the "enpoint.vi" was the culprit for both the tag and messenger.
I tried building with debug enabled and it builds but won't run as an excutable. I tried unchecking "remove unsed polymorphic..", "remove unsed members or project", "disconnect type defs" in varying combinations. Others problesm were encountered so went a different way.
I removed the messanger and tag and instead used real time streams messanger only to encounter "VI broke during the build process from being saved without a block diagram..." again.
My next step is just use a que or RT FIFO. Anybody use channel wires with 9147 (Linux) system? I am using LV 2017
