cRIO FPGA startup conditions

[craigc]

Hi All,

Was hoping someone would be able to confirm what the cRIO FPGA Startup conditions are.  By this I mean when the cRIO module is reset and the power is applied the RT System Boots up.  What condition are the FPGA IO in before it is programed by my startup.exe?  I am assuming that they are All High Impedence or Z.

I am also assuming this does not matter as any IO connected to the FPGA is conditioned before it gets this far anyway?

Seems like a non relevent question but my customer has asked as a query 🙂

Thanks

Craig

[rsw]

Hi Craig,

Correct the modules connected will condition this setting anyway and as you're on a cRIO everything should go via a C-Series module anyway.

Kind Regards,