07-11-2013 05:21 PM
I did right click (or double clicked) on the DMA FIFO in the project window and then increased the value to the max possible.
I think there is a better method though.
07-11-2013 05:25 PM
I think I should have used this method:
http://zone.ni.com/reference/en-XX/help/371599H-01/lvfpgahost/fpga_method_fifo_config/
07-11-2013 05:35 PM
Those methods do different things. When you set the DMA FIFO size in the properties page, it sets the amount of space to be used on the FPGA (and possibly, by extension, the amount of space on the host side). The Configure method determines the amount of space to be allocated to the FIFO on the host side (which usually has much more RAM available) independent of the size of the FIFO on the FPGA.
At regular intervals or when the FIFO is a certain amount full (I don't know the details of the mechanism), the contents of the FPGA side of the FIFO are copied into memory on the host, then cleared from the FPGA to leave room for more data. On the host side, when you read elements, that space is then freed to leave space for more data. It is normal to allocate much more space on the host than on the FPGA, and it should even be possible to read more elements on the host than there are total elements allocated for the FIFO since there could be several buffers worth of data in memory on the host at once. So, if the FIFO is filling when transferring data to the host, I recommend increasing the size of the FIFO on the host using the Configure method, and then reading more elements at a time.
07-11-2013 05:39 PM
I'll give it a try.
07-19-2013 10:51 AM - edited 07-19-2013 10:52 AM
I used a FIFO configure method to increase the depth of the host-side FIFO.
I also changed the timed while loop to a normal (not timed) while loop.
I can read more sample points at a time with read method.
It works for me.