data acquisition and process in FPGA

[catalysthw]

Hi!

In FPGA, I'm trying to acquire analog data (0~10V) with a specific time clock which is rising edge of each digital pulse from encoder.

I made the part of getting data on rising edge, but I don't know how to store  i th and i+1 th data.

(Data Frequency is about less than 250kHz)

I have cRIO-9074, NI 9411(encoder), NI 9205(AI module),

data

  1st  data , 2nd data,  3rd data,   4th 5th 6th 7th .....  i -1 th ,  i th ,  i+1 th....  1200 th  (Approximately)

I need every sum of two consecutive data such as   1st + 2nd ,  2nd +3rd , 3rd+4th data, .... i-1 th + i th ,   i th + (i +1 th)  .... 1199 th + 1200 th  (Approximately)

On the process of two consecutive sum,

 [ i-1 th  +  i th ] / [a value]  +  [ the other i th value from different data acquistion ]  = 1199 data set    (until 1200 th data) 

and then

all the data in the data set (1199 data) will be a total value.

Thank you so much!

All advices are welcome!

Sincerely,

Hyo

[EdgarShadyan89]

Hi.

Use Shift Registers to store the last value. After you can sum it with the next value in the next iteration.

Best Regards,

Edgar Shadyan.

[crossrulz · Accepted solution]

Sounds like a simple Feedback Node will do the trick.