error -61499 in FPGA "An error occured"

[vcb]

Hello,

I'm using Labview 2012 DS2 with FPGA module 12.0.0 and Xilings 13.4

When trying to complie my project, at the end I get this error: (the project was complied succesfully many times before, all I changed is control's default value and since then I get this error)

Error -61499 occurred at niFpgaCompileWorker_AnalyzeTimingViolations.vi<-niFpgaCompileWorker_AnalyzeTimingPaths.vi<-niFpgaCompileWorker_CheckForErrors.vi<-niFpgaCompileWorker_JobComplete.vi<-niFpgaCompile_Worker.vi:1

Possible reason(s):

LabVIEW FPGA:  An internal software error in the LabVIEW FPGA Module has occurred.  Please contact National Instruments technical support at ni.com/support.

Additional Information: Traceback (most recent call last):
  File "./objects/lvfpga_dist/win32U/i386/msvc90/release/root\resource\RVI\TimingViolation\scripts\niFpgaTimingViolationMain.py", line 280, in <module>
NameError: name 'constraintDict' is not defined

Return Code:1

Could anyone help me?

Przemek

[mikeporter]

First, have you done what the error message said? Have you contacted NI?
Second, can you compile another VI? Try something really simple like reading a single value in a loop.
Third, is the compiler running on your computer, or another one over a network?

You should also try repairing the FPGA tools installation. If that doesn't help, uninstall and then reinstall the tools.

Mike...

[vcb]

Hello,

I cannot complie anything, it is a problem with compiler not code. Even vis previously compiled succesfully does not compile. 

The compiler is running on my computer.

I trier to uninstall FPGA + Xilings tools. Didn't help. I tried to complie simple vi, no success. 

Przemek

[ValkoA]

Dear Przemek,

 This might be one of the issues our R&D department is currently investigating. Could you please provide the following details?

• What is the FPGA target yo're compiling for?
• What is the resource utilisation of the bitfile? (an estimate will do)
• Are there any derived clocks created?
• Is there any 3rd party VHDL in the code?

As for the troubleshooting part, I'd recomend to try out the following:

• Reduce te amount of controls and indicators on the front panel, especially large ones like arrays.
• Try mass compiling the FPGA VI before compilation to test for corrption.
• Modify some compiler settings on the bitfile creation. (see the attached screenshot). Try optimizing for area, and increase effort levels.

Please get back to me with the results.

Kind regards:

Andrew Valko

NI Hungary

[vcb]

Hello,

I'm compiling for 9075

The vi is reading data from 4 modules (9237, 9201, 9203, 9213)no derived clocks

no 3rd party VHDL

I do not have any large indicators/ controls. Tried to compile basic vi with one while loop and one read node and one indicator, no result

Hope this helps,

Przemek

[ValkoA]

Dear Przemek,

From the error descriptions, as well as from your experiences, the problem appears to be caused by a corrupted software installation. I'd like you to do the following to fix it.

1. Uninstall all National Instruments software currently on the PC.
2. Manually delete the NI folder to clean out any saved data.
3. Use CCleaner to remove any registry entries left behind.
4. Reinstall NI software. For the FPGA, the prefered order is LabVIEW FPGA,  Xilinx tools the the NI-RIO driver.

This is quite a bit of work, so if ou ave the chance, try to test copilation on a different machine to make sure that the problem is machine-specific.

Kind regards:

Andrew Valko

NIH