fpga

[redfrank]

Hi,

I'm currently working on an FPGA project using Labview - the target I'm developing on is a 7833R on Labview 2011 SP1. The code has been compiling OK until recently, taking about 20 minutes. About a week ago, I got a strange pre-compile stage error stating that there was a problem with one of the FIFOs - it said there were only 2 elements assigned to the FIFO (it was set to 1023 elements, and the actual number said 1029, so this didn't make sense). I changed some of the FIFO settings (assigned number of elements and arbitration settings), but still had the problem. I then reverted back to the original settings for this FIFO and the compilation got past the pre-compilation stage (i.e.. this FIFO issue cleared), however after about 5 minutes the compile returned an error stating the Xilinx tool had run out of memory (2Gb of RAM fitted to this machine).

I then tried to build on a 7853R and it compiled OK, with a maximum memory usage on the PC (monitored with task manager) of 1.2Gb.

I then rebuilt on the 7833R again and although it didn't compile ok, it sat compiling for about 20 minutes, using 1.2Gb, before displaying a timing violation which was due to my code. Having fixed the timing violation, I again encountered this memory issue - this time I watched the graph on task manager, and could see immediately on starting the compile, memory was getting allocated at a constant rate until eventually the process ran out and gave up (after about 5 minutes of running).

I then created a new 7833R target in my project, copied all code, FIFOs etc across and recompiled - this time it compiled ok.

Since that point I have been getting this same memory usage issue every few times I attempt to compile, at which point I switch between the 2 7833R targets in my project. Switching does seem to temporarily fix the problem, if I stay with the same target the problem does seem to repeat. However sooner or later I get the problem again and I switch target again.

I could understand if the PC was right on the 2Gb limit while compiling and sometimes getting nudged just over, but that isn't what's happening as a successful compile stays at 1.2Gb for the duration.

Has anyone else seen anything similar or can suggest a solution?

I probably should put this in a different post, but as it's the same code I'm using, I'll mention it here. I have also tried compiling the code on Labview 2012 ( to see if the issue is confined to LV2011 SP1) - the code successfully compiled but took 1hr 45 mins to compile, as opposed to 20 minutes with Labview 2011 SP1. About a year ago, on a similar but different project I also attempted to port my code developed in Labview 2011 SP 1 across to Labview 2012 and had the same issue - 15 minute compile times suddenly turning into 1.5 to 2 hours. Needless to say I decided to stick developing on 2011 SP1.

Has anyone else seen huge compile time increases when upgrading LV, or got any tips for reducing the compile time in LV2012 (that don't involve buying a new PC!)

Cheers,

redfrank

[M.Kuznetsov]

Hi redfrank,

Thank you for the post!

I did a research on this issue and I confirm that sometimes (depending on the size of the project) 2GB of RAM is 

not enough to successfully compile the project. Memory usage of the compiler has significately been improved

in LabVIEW 2013.

In order to give you a potential solution I need a little more details about your system:

1. If it is possible I would like to see NI MAX technical report. Here are the steps on how to generate the report:

http://digital.ni.com/public.nsf/allkb/271F252B4EF0A2E0862570E70056A1E4

2. It would be perfect if I could take a look at your code as well.

3. Could you give me a specific error and error code you are getting at the moment.

Thank you!

All the best,

[redfrank]

Hi, sorry for the late reply but I've been busy working on other things. The memory error I encountered in LV2011 SP1 eventually stopped occuring, or at least occurred so infrequently as to allow me to complete the development task.

Unfortunately due to the nature of my work I can't post any code / VIs, and I appreciate that that means any support you'll be able to give is limited.

I am now working on a new project which is based on the project which was causing me this grief. I was getting another strange error when building this new project under LV 2011 SP1, so decided to see if LV2013 would clear this issue. The VI was taking 20-30 minutes to compile in LV2011, but has just completed having taken 1 hr 45 minutes. 1hr 30 minutes of this was spent Translating, and the Xilinx log was stuck with the last line Process "Translate" failed. Further on in the log file after the compiler had eventually finished, it showed Translate done. The bitfile generated during this compilation was functional.

In short, I am experiencing a huge increase in compile time when upgrading to either LV2012 or LV2013 from LV2011, but I ideally want to take advantage of additional features and bug fixes in the newest version.

[redfrank]

Just to add some further information: I built my project (with a few tweaks) last night and it took 2hrs 15 to compile for the 7833R. I also compiled for a 7853R and this took 40 minutes. Could there be some issue with the Virtex II and LV 2012 onwards?

[Jed_Davidow]

I just upgraded from 2012 to 2013, and I am getting outrageous compile times (actually, I have not waited beyind the 3 hours that the compile was taking).

Last week, my laptop compiled this code in 5-15 minutes.  After upgrading this i5, I let it run all afternoon and just gave up after 3 hours 45 min.

Just to see, installed on another network machine, an i7.  That is running now and it's at 25m, still translating.

Another test:  Created a very simple VI, nothing but two I16s adding, no loop.  That ran for 45 minutes before I gave up.

What's going on here?  Anyone else with any 2013 FPGA problems?

[T-REX$]

Just FYI, there is an issue with Virtex-II compilations taking a long time in LabVIEW 2013. It's still under investigation under CAR #428544 (Corrective Action Request). Look for that number in future versions of the LabVIEW FPGA bug fix list (It's in the module's readme), or in any upcoming patch releases. I would also like to note that we only release patches for issues that we can safely fix in the current release. Until we know what the fix is, I can't promise that we will be able to provide a patch to fix this issue for the 2013 release.

[Jed_Davidow]

Shouldn't that come up when the SW makes that request to the Server to see if there are any updates?  How about a big warning?

I am really annoyed here.

[T-REX$]

If a patch becomes available, you'll see it in NI Update Service with a description of what's been fixed. We don't really have any way to do an "auto-notification" of potential known issues you could run into in the product (which I think is what you might be hinting at with the "big warning"...). The best I can give you for being forewarned about potential issues is the LabVIEW FPGA Known Issues List. It gets updated quarterly, so recently reported issues (like this one) won't be on there yet. I'll post back here if we have a solution or workaround discovered during the investigation. Thanks.

[Jed_Davidow]

OK, I reverted my code using perforce and started over again with 2012 (had to downgrade my target too).

Now I get an error when I compile.  (The 2013 package is still installed).

Looking this up, the advice is to reinstall all the 2012 tools.  Great.

Error -61499 occurred at niFpgaCompileWorker_AnalyzeTimingViolations.vi<-niFpgaCompileWorker_AnalyzeTimingPaths.vi<-niFpgaCompileWorker_CheckForErrors.vi<-niFpgaCompileWorker_JobComplete.vi<-niFpgaCompile_Worker.vi:1

Possible reason(s):

LabVIEW FPGA: An internal software error in the LabVIEW FPGA Module has occurred. Please contact National Instruments technical support at ni.com/support.
=========================
LabVIEW FPGA: An internal software error in the LabVIEW FPGA Module has occurred. Please contact National Instruments technical support at ni.com/support.

Additional Information: Traceback (most recent call last):
File "./objects/lvfpga_dist/win32U/i386/msvc90/release/root\resource\RVI\TimingViolation\scripts\niFpgaTimingViolationMain.py", line 280, in <module>
NameError: name 'constraintDict' is not defined

Return Code:1

[Jed_Davidow]

Seriously, this is causing me DAYS of delay.

Once upon a time I did not fear adding NI Software to my machines.  But as a developer who needs to have several versions installed, this is a freaking nightmare.

My main dev box was ruined with the 2013 install (launhing 2013 brings up a dialog box asking me to configure 8.2.1 RTE, which makes no sense), and it looks like the 2013 FPGA install has corrupted the FPGA install on my laptop.  So I am here uninstalling all 2012/2013 FPGA and RT modules, and I will have to reinstall them when I am done.

GET YOUR ACT TOGETHER.